LDPC Encoding &
Decoding IP

Offloading of computationally expensive physical layer processing such as the forward error correction, is one of the key enablers for a fully virtualized open radio access network. VVDN’s advanced LDPC encoding and decoding solution is specifically designed for the 3GPP New Radio uplink and downlink data channel.

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Key Features

01

Separate data-path for encoding and decoding offload

Efficiently handles data encoding and decoding tasks separately.

02

HARQ implementation for uplink (decode) data path

Supports Hybrid Automatic Repeat Request for improved uplink performance.

03

PCIE x8 / x16 QDMA interface and enqueue/dequeue descriptor mechanism

Allows seamless communication between the host and FPGA.

04

Control and Data Plane Split module

Separates control information from the AXI stream input for efficient processing.

05

LDPC control block

Packs and forwards control information in the specified format and bus widths.

06

CRC attach and detach

Performs CRC attachment before encoding and detachment after decoding.

07

Hardened SD-FEC on RFSoC

Configurable LDPC Encoder/Decoder with 6 x SDFEC for decoding and 2 x SDFEC for encoding.

At VVDN, we understand the diverse needs of different market segments, and our LDPC IP solution offers customization and support tailored to specific requirements.

System Integrators

Our flexible hardware implementations enable scalable and cost-effective solutions.

Engineering Services Companies

Benefit from end-to-end support, spanning from software to hardware expertise.

Infrastructure Focused Companies

Enjoy a scalable architecture with multiple options to meet evolving demands.

Test & Measurement Companies

Experience interface simplicity, transport bandwidth scalability, interoperability, and function symmetry.

Server Vendors

Transform your off-the-shelf hardware into powerful 5G processing units.

Aerospace and Defence

Industrial

LDPC Encoding & Decoding IP